1. Field of the Invention
The invention relates generally to providing a plurality of regulated supply voltages to an integrated circuit. In one embodiment, a voltage regulation message is exchanged between an integrated circuit and a VR providing a plurality of supply voltages to the integrated circuit. More particularly, the voltage regulation message may include an identifier indicating two or more supply voltages selected from the plurality of supply voltages provided from the VR to the integrated circuit.
2. Background Art
As semiconductor manufacturing technologies improve, integrated circuits (ICs) are being produced which are more complex, more compact, and which run at higher clock frequencies. Power management of these ICs has also become more complex, as improvements to scale and/or speed of an IC often rely on incremental improvements to power efficiency. One measure of good power management in a system having such an IC is its responsiveness in changing operating characteristic of the system.
In existing systems, a voltage regulator (VR) may be used to provide a supply voltage to an IC such as a processor capable of performing various data processing operations. During operation of the processor, an operating characteristic of the processor may need to be changed—e.g. to accommodate an existing or expected processing load of the processor by having the VR transition from providing the supply voltage at a first supply voltage level to providing the supply voltage at a second supply voltage level. This transition of the supply voltage may be in response to the VR receiving from the IC a message requesting a particular transition for the particular supply voltage.
In some cases, the VR provides multiple supply voltages to the processor. Traditionally, a processor receiving multiple supply voltages from a VR requests transitions of supply voltages individually. For example, a processor may need to change a power state by transitioning both a first supply voltage provided by the VR and a second supply voltage provided by the VR. To implement this change of power state, the processor will initially send to the VR a first message to initiate a transition of the first supply voltage, and then send to the VR a second message to initiate another transition of the second supply voltage.
The delay in changing a power state of an IC which results from sending multiple supply voltage transition requests is an increasingly significant bottleneck to improving IC performance, particularly as the demand for more responsive IC power management mechanisms grows. The impact of these delays may be compounded, for example, by any inherent delays between the sending of the multiple supply voltage transition requests, by any inherent delays in the VR responding to each individual received supply voltage transition request, and/or by any concurrent or future supply voltage transition requests of other ICs. These delays both limit the power management of existing ICs and limit further improvement to IC design which rely on more responsive power management mechanisms.